In video signal processing systems, either purely analog or digitized video, it is often desirable to implement a back-porch clamp to set the DC operating point of the signal to a predetermined reference voltage. To understand conventional practice, the recommended operation of the Broadcom 7020 IC 10 as shown in FIG. 1 is explained. A video signal V1 is buffered by a Video Op Amp 6 and is provided through a coupling capacitor 8 to the Video Input of IC 10 wherein it is digitized by an A/D Converter 12 and applied, in parallel, to a Video Decoder (VDEC) 14 and one input 16 of a keyed Comparator 18. The other comparator input 20 receives a predetermined reference voltage 22. The comparator output 24 is an error signal, which communicates the difference between the back-porch voltage level of comparator input 16 and the predetermined reference voltage 22. A Back-Porch Clamp (BPC) Pulse 26 is generated in the VDEC 14 and is used to enable the comparator 18 during the back-porch interval. Error signal 24 and BPC pulse 26 are applied to Pulse Width Modulator (PWM) 28, which outputs a duty-cycle modulated signal 30 during the BPC pulse interval and whose output is tri-stated to an essentially open-circuit condition during all other times. PWM output 30 is a pulse train operating at a horizontal rate, whose upper and lower levels are approximately zero volts and 3.3 volts respectively, and whose pulse width is approximately 50% when the comparator input 16 equals the predetermined reference voltage 22 and varies from near 0% to near 100% as comparator input 16 varies from maximally high compared to predetermined reference voltage 22 to maximally low compared to predetermined reference voltage 22. In this manner the PWM output 30 is of a polarity to provide negative feedback suitable to correct the DC restoration of the Video Input. PWM output 30 is low-pass filtered by resistor 32 and capacitor 34, this filtered value being applied to the Video Input through resistor 36. The corrected value of DC bias applied to Video Input is stored on coupling capacitor 8, which holds this value until the next horizontal back-porch interval, at which point a newly corrected bias is applied. However, when video is first applied to the A/D Converter 12 input, the bias voltage of the VDEC 14 input will likely be outside the dynamic range of the VDEC 14 and will thus make it difficult for the VDEC 14 to determine the location of horizontal sync and thus a properly timed BPC pulse will not be available. For this reason the VDEC 14 operates in a free-running mode until the feedback loop slowly responds and VDEC 14 finds the horizontal sync, measures how far the A/D value of the following back-porch is from the ideal value of 240 (out of 1024 A/D values) and corrects to adjust the back-porch level at comparator input 16 to the proper value. Afterwards the VDEC 14 operates in a locked mode to properly identify sync and the back-porch interval. There are several problems encountered when implementing a back-porch clamp as described above. First, a Video Op Amp is required to provide a very low output impedance driver in order to minimize an offset in the loop due to contamination of Video Input by the PWM signal. Second, the loop gain is determined by the inverse of the sum of resistors 32 and 36, and thus is relatively low. Third, the loop response stability is difficult to achieve as two dominant poles, associated with input capacitor 8 and filter capacitor 34, are employed, and initial stabilization of the loop is lengthy due to the difficulty of identifying the back-porch interval when the A/D Converter 12 and VDEC 14 are initially outside their optimal dynamic range. The present invention is directed towards solving these problems in a very cost effective manner.